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Get Delay Fault Testing for VLSI Circuits (Frontiers in PDF

By Angela Krstic,Kwang-Ting (Tim) Cheng

ISBN-10: 0792382951

ISBN-13: 9780792382959

ISBN-10: 1461375614

ISBN-13: 9781461375616

within the early days of electronic layout, we have been all in favour of the logical correctness of circuits. We knew that if we bogged down the clock sign sufficiently, the circuit could functionality appropriately. With advancements within the semiconductor procedure expertise, our expectancies on pace have soared. an often requested query within the final decade has been how briskly can the clock run. This places major calls for on timing research and hold up trying out. Fueled by means of the above occasions, a massive progress has happened within the learn on hold up trying out. fresh paintings comprises fault versions, algorithms for try out new release and fault simulation, and techniques for layout and synthesis for testability. The authors of this ebook, Angela Krstic and Tim Cheng, have in my opinion contributed to this examine. Now they do a fair better carrier to the occupation by means of amassing the paintings of a big variety of researchers. as well as expounding this kind of good deal of knowledge, they've got added it with utmost readability. To additional the reader's knowing many key strategies are illustrated through uncomplicated examples. the fundamental rules of hold up checking out have reached a degree of adulthood that makes them compatible for perform. In that experience, this booklet is the easiest x hold up FAULT trying out FOR VLSI CIRCUITS to be had consultant for an engineer designing or trying out VLSI platforms. Tech­ niques for course hold up checking out and to be used of slower attempt apparatus to check high-speed circuits are of specific interest.

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Delay Fault Testing for VLSI Circuits (Frontiers in Electronic Testing) by Angela Krstic,Kwang-Ting (Tim) Cheng

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